Add over word
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parent
cf1af6b412
commit
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3 changed files with 34 additions and 44 deletions
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@ -1,43 +0,0 @@
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.include "$lib/core.asm"
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.include "$lib/std.asm"
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.include "$lib/main.asm"
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.define MEM_CALL_STACK, CORE_MEM_MEM
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.macro stack_transfer_alu
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.std_ld
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tlr CORE_REG_B
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.std_ld
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tlr CORE_REG_A
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.endmacro
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.macro call_word, call_word_arg_0_label
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ts (OFFSET + 14)
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tlr CORE_REG_A
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ts MEM_CALL_STACK
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set
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ts call_word_arg_0_label
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tlr CORE_REG_PC
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.endmacro
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.macro return_word
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.std_get MEM_CALL_STACK
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tlr CORE_REG_PC
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.endmacro
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.jump_main
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data:
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data_strings:
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words:
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main:
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.main main
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push 10
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tss
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tls
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tss
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tls
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.std_ld
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tlr CORE_REG_A
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.std_set CORE_MEM_CHR
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.std_ld
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tlr CORE_REG_A
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.std_set CORE_MEM_CHR
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.std_ld
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tlr CORE_REG_A
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.std_set CORE_MEM_CHR
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.std_stop
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@ -207,7 +207,40 @@ impl compiler::Compilable<compiler::Data, hence::parser::ast::Body> for Instruct
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arg: None,
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arg: None,
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},
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},
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]),
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]),
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Instruction::Over => Ok(vec![]),
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Instruction::Over => Ok(vec![
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hence::parser::ast::Node::MacroCall {
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name: "std_ld".to_string(),
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args: vec![],
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},
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hence::parser::ast::Node::Call {
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name: "tlr".to_string(),
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arg: Some(hence::arg::Arg::Variable("CORE_REG_A".to_string())),
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},
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hence::parser::ast::Node::Call {
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name: "tss".to_string(),
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arg: None,
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},
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hence::parser::ast::Node::Call {
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name: "tlr".to_string(),
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arg: Some(hence::arg::Arg::Variable("CORE_REG_B".to_string())),
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},
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hence::parser::ast::Node::Call {
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name: "tsr".to_string(),
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arg: Some(hence::arg::Arg::Variable("CORE_REG_A".to_string())),
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},
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hence::parser::ast::Node::Call {
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name: "tls".to_string(),
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arg: None,
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},
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hence::parser::ast::Node::Call {
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name: "tsr".to_string(),
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arg: Some(hence::arg::Arg::Variable("CORE_REG_B".to_string())),
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},
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hence::parser::ast::Node::Call {
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name: "tls".to_string(),
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arg: None,
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},
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]),
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Instruction::Rot => Ok(vec![]),
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Instruction::Rot => Ok(vec![]),
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Instruction::Nip => Ok(vec![]),
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Instruction::Nip => Ok(vec![]),
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Instruction::I => Ok(vec![]),
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Instruction::I => Ok(vec![]),
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