From c96368c494bc7e3112fb58f52d83fadc42f6c0cb Mon Sep 17 00:00:00 2001
From: Dominic Grimm <dominic.grimm@gmail.com>
Date: Fri, 9 Sep 2022 14:17:04 +0200
Subject: [PATCH] Add over word

---
 henceforth/examples/test.asm               |  43 ---------------------
 henceforth/examples/test.bin               | Bin 32768 -> 0 bytes
 henceforth/src/lib/compiler/instruction.rs |  35 ++++++++++++++++-
 3 files changed, 34 insertions(+), 44 deletions(-)
 delete mode 100644 henceforth/examples/test.asm
 delete mode 100644 henceforth/examples/test.bin

diff --git a/henceforth/examples/test.asm b/henceforth/examples/test.asm
deleted file mode 100644
index 8325d62..0000000
--- a/henceforth/examples/test.asm
+++ /dev/null
@@ -1,43 +0,0 @@
-.include "$lib/core.asm"
-.include "$lib/std.asm"
-.include "$lib/main.asm"
-.define MEM_CALL_STACK, CORE_MEM_MEM
-.macro stack_transfer_alu
-.std_ld
-tlr CORE_REG_B
-.std_ld
-tlr CORE_REG_A
-.endmacro
-.macro call_word, call_word_arg_0_label
-ts (OFFSET + 14)
-tlr CORE_REG_A
-ts MEM_CALL_STACK
-set
-ts call_word_arg_0_label
-tlr CORE_REG_PC
-.endmacro
-.macro return_word
-.std_get MEM_CALL_STACK
-tlr CORE_REG_PC
-.endmacro
-.jump_main
-data:
-data_strings:
-words:
-main:
-.main main
-push 10
-tss
-tls
-tss
-tls
-.std_ld
-tlr CORE_REG_A
-.std_set CORE_MEM_CHR
-.std_ld
-tlr CORE_REG_A
-.std_set CORE_MEM_CHR
-.std_ld
-tlr CORE_REG_A
-.std_set CORE_MEM_CHR
-.std_stop
\ No newline at end of file
diff --git a/henceforth/examples/test.bin b/henceforth/examples/test.bin
deleted file mode 100644
index 3a9fe762bdf2575aa723d1d34513536b2a5c90a0..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 32768
zcmeIuu?c`c5Jb^ERt;?WKyWdzNDC28b32eXKbiPtzpKT%A8*?db6)NIo*bjX2oNAZ
zfB*pk1PBlyK!5-N0t5&UAV7cs0RjXF5FkK+009C72oNAZfB*pk1PBlyK!5-N0t5&U
zAV7cs0RjXF5FkK+009C72oNAZfB*pk1PBlyK!5-N0t5&UAV7cs0RjXF5FkK+009C7
q2oNAZfB*pk1PBlyK!5-N0t5&UAV7cs0RjXF5FkK+z%K<drg{Ln-VVe7

diff --git a/henceforth/src/lib/compiler/instruction.rs b/henceforth/src/lib/compiler/instruction.rs
index 60e34aa..5f011b5 100644
--- a/henceforth/src/lib/compiler/instruction.rs
+++ b/henceforth/src/lib/compiler/instruction.rs
@@ -207,7 +207,40 @@ impl compiler::Compilable<compiler::Data, hence::parser::ast::Body> for Instruct
                     arg: None,
                 },
             ]),
-            Instruction::Over => Ok(vec![]),
+            Instruction::Over => Ok(vec![
+                hence::parser::ast::Node::MacroCall {
+                    name: "std_ld".to_string(),
+                    args: vec![],
+                },
+                hence::parser::ast::Node::Call {
+                    name: "tlr".to_string(),
+                    arg: Some(hence::arg::Arg::Variable("CORE_REG_A".to_string())),
+                },
+                hence::parser::ast::Node::Call {
+                    name: "tss".to_string(),
+                    arg: None,
+                },
+                hence::parser::ast::Node::Call {
+                    name: "tlr".to_string(),
+                    arg: Some(hence::arg::Arg::Variable("CORE_REG_B".to_string())),
+                },
+                hence::parser::ast::Node::Call {
+                    name: "tsr".to_string(),
+                    arg: Some(hence::arg::Arg::Variable("CORE_REG_A".to_string())),
+                },
+                hence::parser::ast::Node::Call {
+                    name: "tls".to_string(),
+                    arg: None,
+                },
+                hence::parser::ast::Node::Call {
+                    name: "tsr".to_string(),
+                    arg: Some(hence::arg::Arg::Variable("CORE_REG_B".to_string())),
+                },
+                hence::parser::ast::Node::Call {
+                    name: "tls".to_string(),
+                    arg: None,
+                },
+            ]),
             Instruction::Rot => Ok(vec![]),
             Instruction::Nip => Ok(vec![]),
             Instruction::I => Ok(vec![]),