291 lines
8.4 KiB
Rust
291 lines
8.4 KiB
Rust
use anyhow::{bail, Result};
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use itertools::Itertools;
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use radix_fmt::radix;
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use std::cmp::Ordering;
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use std::io::{self, Write};
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#[derive(Debug)]
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pub struct Data {
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program: [u8; 32 * 1024],
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pub tmp: u16,
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pub reg_pc: u16,
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pub reg_opc: u8,
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pub reg_arg: u16,
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pub reg_s: u8,
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pub reg_sp: u16,
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pub reg_a: u16,
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pub reg_b: u16,
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pub reg_c: u16,
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pub reg_d: u16,
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memory: [u16; 16 * 1024],
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term: console::Term,
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}
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impl Data {
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pub fn new(program: [u8; 32 * 1024]) -> Self {
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Self {
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program,
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tmp: 0,
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reg_pc: 0,
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reg_opc: 0,
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reg_arg: 0,
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reg_s: 0,
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reg_sp: 0,
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reg_a: 0,
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reg_b: 0,
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reg_c: 0,
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reg_d: 0,
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memory: [0; 16 * 1024],
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term: console::Term::stdout(),
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}
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}
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pub fn get_memory(&self, address: u16) -> Result<u16> {
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if address < (32 * 1024) {
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match self.program.get(address as usize) {
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Some(val) => Ok(*val as u16),
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None => Ok(0),
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}
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// } else if address < (40 * 1024) {
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// Ok(self.stack[(address - (32 * 1024)) as usize])
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} else if address < (48 * 1024) {
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Ok(self.memory[(address - (32 * 1024)) as usize])
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} else if address == (48 * 1024 + 2) {
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Ok(self.term.read_char()? as u16)
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} else {
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Ok(0)
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}
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}
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pub fn set_memory(&mut self, address: u16, value: u16) -> Result<()> {
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// if ((32 * 1024)..(40 * 1024)).contains(&address) {
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// self.stack[(address - (32 * 1024)) as usize] = value;
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if ((32 * 1024)..(48 * 1024)).contains(&address) {
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self.memory[(address - (32 * 1024)) as usize] = value;
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} else if address == (48 * 1024) {
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print!("{}", value);
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io::stdout().flush()?;
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} else if address == (48 * 1024 + 1) {
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print!("{}", char::from(value as u8));
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io::stdout().flush()?;
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}
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Ok(())
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}
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pub fn get_register(&self, register: u8) -> u16 {
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match register {
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0x0 => self.reg_pc,
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0x1 => self.reg_opc as u16,
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0x2 => self.reg_arg,
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0x3 => self.reg_s as u16,
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0x4 => self.reg_sp,
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0x5 => self.reg_a,
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0x6 => self.reg_b,
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0x7 => self.reg_c,
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0x8 => self.reg_d,
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_ => 0,
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}
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}
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pub fn set_register(&mut self, register: u8, value: u16) -> u16 {
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match register {
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0x0 => {
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self.reg_pc = value;
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value
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}
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0x1 => {
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self.reg_opc = value as u8;
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value & 0xff
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}
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0x2 => {
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self.reg_arg = value;
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value
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}
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0x3 => {
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self.reg_s = value as u8;
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value & 0xff
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}
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0x4 => {
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self.reg_sp = value;
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value
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}
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0x5 => {
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self.reg_a = value;
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value
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}
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0x6 => {
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self.reg_b = value;
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value
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}
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0x7 => {
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self.reg_c = value;
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value
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}
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0x8 => {
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self.reg_d = value;
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value
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}
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_ => 0,
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}
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}
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fn alu(&mut self, operation: u8) -> Result<()> {
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match operation {
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0x00 => {
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self.tmp = !self.reg_a;
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}
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0x01 => {
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self.tmp = self.reg_a & self.reg_b;
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}
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0x02 => {
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self.tmp = self.reg_a | self.reg_b;
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}
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0x03 => {
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self.tmp = self.reg_a ^ self.reg_b;
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}
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0x04 => {
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self.tmp = self.reg_a << self.reg_b;
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}
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0x05 => {
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self.tmp = self.reg_a >> self.reg_b;
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}
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0x06 => {
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self.tmp = self
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.reg_a
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.wrapping_add(self.reg_b)
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.wrapping_add((self.reg_s & 0b00000001) as u16);
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self.reg_s &= 0b11111110;
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if self.tmp < self.reg_a {
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self.tmp |= 0b00000001;
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}
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}
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0x07 => {
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self.tmp = self
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.reg_a
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.wrapping_sub(self.reg_b)
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.wrapping_sub((self.reg_s & 0b00000001) as u16);
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self.reg_s &= 0b11111110;
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if self.tmp > self.reg_a {
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self.tmp |= 0b00000001;
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}
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}
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0x08 => {
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self.tmp = self.reg_a.wrapping_mul(self.reg_b);
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self.reg_s &= 0b11111110;
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}
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0x09 => {
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self.tmp = self.reg_a / self.reg_b;
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self.reg_s &= 0b11111110;
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}
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0x0a => {
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self.tmp = match self.reg_a.cmp(&self.reg_b) {
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Ordering::Equal => 0,
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Ordering::Less => 1,
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Ordering::Greater => 2,
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}
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}
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0x0b => {
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self.tmp = (self.reg_a == self.reg_b) as u16;
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}
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0x0c => {
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self.tmp = (self.reg_a < self.reg_b) as u16;
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}
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0x0d => {
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self.tmp = (self.reg_a > self.reg_b) as u16;
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}
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0x0e => {
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self.tmp = (self.reg_a <= self.reg_b) as u16;
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}
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0x0f => {
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self.tmp = (self.reg_a >= self.reg_b) as u16;
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}
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0x10 => {
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self.tmp = (self.reg_a & 1 == 1) as u16;
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}
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0x11 => {
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self.tmp = (self.reg_a & 1 != 1) as u16;
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}
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0x12 => {
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self.tmp = rand::random();
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}
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_ => bail!("Invalid ALU operation: 0x{}", radix(operation, 16)),
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}
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Ok(())
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}
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}
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pub fn emulate(data: &mut Data) -> Result<()> {
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while data.reg_pc != 0xffff {
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data.reg_opc = data.get_memory(data.reg_pc)? as u8;
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data.reg_pc = data.reg_pc.wrapping_add(1);
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if data.reg_opc >> 7 == 1 {
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data.reg_opc &= 0b0111111;
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data.reg_arg = 0;
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} else {
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data.reg_arg = data.get_memory(data.reg_pc)? << 8;
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data.reg_pc = data.reg_pc.wrapping_add(1);
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data.reg_arg |= data.get_memory(data.reg_pc)?;
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data.reg_pc = data.reg_pc.wrapping_add(1);
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}
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match data.reg_opc {
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0x00 => {}
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0x01 => {
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data.tmp = data.reg_arg;
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data.memory[data.reg_sp as usize] = data.reg_arg;
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data.reg_sp = data.reg_sp.wrapping_add(1);
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}
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0x02 => {
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data.reg_sp = data.reg_sp.wrapping_sub(1);
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data.memory[data.reg_sp as usize] = 0;
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}
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0x03 => {
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data.tmp = data.reg_arg;
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}
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0x04 => {
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data.tmp = data.get_register(data.reg_arg as u8);
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}
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0x05 => {
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data.tmp = data.memory[data.reg_sp.wrapping_sub(1) as usize];
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}
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0x06 => {
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data.set_register(data.reg_arg as u8, data.tmp);
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}
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0x07 => {
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if data.reg_a & 1 == 1 {
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data.set_register(data.reg_arg as u8, data.tmp);
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}
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}
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0x08 => {
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data.memory[data.reg_sp as usize] = data.tmp;
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data.reg_sp = data.reg_sp.wrapping_add(1);
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}
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0x09 => {
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println!(
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"[DEBUG]: [{}]",
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data.memory.iter().take(data.reg_sp as usize).join(", ")
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);
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print!("Press enter to continue execution...",);
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io::stdout().flush()?;
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data.term.read_line()?;
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}
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0x0a => {
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data.alu(data.tmp as u8)?;
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}
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0x0b => {
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data.tmp = data.get_memory(data.tmp)?;
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}
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0x0c => {
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data.set_memory(data.tmp, data.reg_a)?;
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}
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_ => bail!("Invalid opcode: 0x{}", radix(data.reg_opc, 16)),
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}
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}
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Ok(())
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}
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