Did stuff
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366ac05225
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2 changed files with 171 additions and 41 deletions
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@ -1,4 +1,4 @@
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@ hence core lib
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; hence core lib
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core:
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core_mem:
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.define CORE_MEM_PRG, (0 * 1024)
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@ -40,7 +40,7 @@ core:
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.define CORE_ALU_INV, 0x11
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.define CORE_ALU_RND, 0x12
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@ hence standard lib
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; hence standard lib
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STD:
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.define STD_U8_MAX, 0xff
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.define STD_U16_MAX, 0xffff
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@ -65,42 +65,42 @@ end_input:
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dbg
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main:
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@ loop body
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; loop body
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loop:
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@ read key from stdin
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; read key from stdin
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ts CORE_MEM_KEY
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get
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@ check if key is newline (0x0a)
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tlr CORE_REG_D @ store in register D because register A is used later on
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tlr CORE_REG_A @ store in register A as input for ALU
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ts "\n" @ store newline in TMP
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tlr CORE_REG_B @ store newline in register B as input for ALU
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ts CORE_ALU_EQ @ ALU equal operation
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alu @ run ALU
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; check if key is newline (0x0a)
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tlr CORE_REG_D ; store in register D because register A is used later on
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tlr CORE_REG_A ; store in register A as input for ALU
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ts "\n" ; store newline in TMP
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tlr CORE_REG_B ; store newline in register B as input for ALU
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ts CORE_ALU_EQ ; ALU equal operation
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alu ; run ALU
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@ go back to loop start if pressed key is newline
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tlr CORE_REG_A @ store result of ALU operation in TMP
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@ ts loop @ load memory address of loop start into TMP
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; go back to loop start if pressed key is newline
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tlr CORE_REG_A ; store result of ALU operation in TMP
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; ts loop ; load memory address of loop start into TMP
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ts 0
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tls
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ts jump_switch
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tls
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ts end_input
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tlrc CORE_REG_PC @ set register PC to loop start address if result is true
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tlrc CORE_REG_PC ; set register PC to loop start address if result is true
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pop
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tlr CORE_REG_A
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ts 0
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tlrc CORE_REG_C
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@ print out char
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tsr CORE_REG_D @ get char
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tlr CORE_REG_A @ load char into register A
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ts CORE_MEM_CHR @ set TMP to char print memory address
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set @ print char
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; print out char
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tsr CORE_REG_D ; get char
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tlr CORE_REG_A ; load char into register A
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ts CORE_MEM_CHR ; set TMP to char print memory address
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set ; print char
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@ increment counter by one
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; increment counter by one
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tsr CORE_REG_C
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tlr CORE_REG_A
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ts 1
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@ -120,27 +120,10 @@ main:
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ts "\n"
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tlr CORE_REG_A
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ts CORE_MEM_CHR
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set
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tsr CORE_REG_C
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tls
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dbg
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pop
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ts 0
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tlr CORE_REG_C
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ts loop
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tlr CORE_REG_PC
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@ .std_stop
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@ set PC to maximum for u16 and therefore stops program execution
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ts 0xffff @ load 0xffff into TMP
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tlr CORE_REG_PC @ store value of TMP into register PC
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jump_switch:
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dbg
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; set PC to maximum for u16 and therefore stops program execution
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ts 0xffff ; load 0xffff into TMP
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tlr CORE_REG_PC ; store value of TMP into register PC
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.org jump_main
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ts main
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147
examples/forth_old.asm
Normal file
147
examples/forth_old.asm
Normal file
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@ -0,0 +1,147 @@
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@ hence core lib
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core:
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core_mem:
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.define CORE_MEM_PRG, (0 * 1024)
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.define CORE_MEM_ST, (32 * 1024)
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.define CORE_MEM_MEM, (40 * 1024)
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.define CORE_MEM_OUT, (56 * 1024)
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.define CORE_MEM_CHR, (56 * 1024 + 1)
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.define CORE_MEM_KEY, (56 * 1024 + 2)
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core_reg:
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.define CORE_REG_PC, 0x0
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.define CORE_REG_OPC, 0x1
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.define CORE_REG_ARG, 0x2
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.define CORE_REG_S, 0x3
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.define CORE_REG_SP, 0x4
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.define CORE_REG_A, 0x5
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.define CORE_REG_B, 0x6
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.define CORE_REG_C, 0x7
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.define CORE_REG_D, 0x8
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core_alu:
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.define CORE_ALU_NOT, 0x00
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.define CORE_ALU_AND, 0x01
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.define CORE_ALU_OR, 0x02
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.define CORE_ALU_XOR, 0x03
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.define CORE_ALU_LSH, 0x04
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.define CORE_ALU_RSH, 0x05
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.define CORE_ALU_ADD, 0x06
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.define CORE_ALU_SUB, 0x07
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.define CORE_ALU_MUL, 0x08
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.define CORE_ALU_DIV, 0x09
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.define CORE_ALU_CMP, 0x0a
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.define CORE_ALU_EQ, 0x0b
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.define CORE_ALU_LT, 0x0c
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.define CORE_ALU_GT, 0x0d
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.define CORE_ALU_LEQ, 0x0e
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.define CORE_ALU_GEQ, 0x0f
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.define CORE_ALU_BOL, 0x10
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.define CORE_ALU_INV, 0x11
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.define CORE_ALU_RND, 0x12
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@ hence standard lib
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STD:
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.define STD_U8_MAX, 0xff
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.define STD_U16_MAX, 0xffff
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.macro std_stop
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ts 0xffff
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tlr CORE_REG_PC
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.macroend
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forth:
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.define FORTH_MEM_INPUT_SIZE, 16
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.define FORTH_MEM_INPUT_DYN_SIZE, CORE_MEM_MEM
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.define FORTH_MEM_INPUT_START, (FORTH_MEM_INPUT_DYN_SIZE + 1)
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.define FORTH_MEM_INPUT_END, (FORTH_MEM_INPUT_START + FORTH_MEM_INPUT_SIZE)
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.define jump_main, (CORE_MEM_ST - 3 - 1)
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ts jump_main
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tlr CORE_REG_PC
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end_input:
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dbg
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main:
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@ loop body
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loop:
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@ read key from stdin
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ts CORE_MEM_KEY
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get
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@ check if key is newline (0x0a)
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tlr CORE_REG_D @ store in register D because register A is used later on
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tlr CORE_REG_A @ store in register A as input for ALU
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ts "\n" @ store newline in TMP
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tlr CORE_REG_B @ store newline in register B as input for ALU
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ts CORE_ALU_EQ @ ALU equal operation
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alu @ run ALU
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@ go back to loop start if pressed key is newline
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tlr CORE_REG_A @ store result of ALU operation in TMP
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@ ts loop @ load memory address of loop start into TMP
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ts 0
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tls
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ts jump_switch
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tls
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ts end_input
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tlrc CORE_REG_PC @ set register PC to loop start address if result is true
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pop
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tlr CORE_REG_A
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ts 0
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tlrc CORE_REG_C
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@ print out char
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tsr CORE_REG_D @ get char
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tlr CORE_REG_A @ load char into register A
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ts CORE_MEM_CHR @ set TMP to char print memory address
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set @ print char
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@ increment counter by one
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tsr CORE_REG_C
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tlr CORE_REG_A
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ts 1
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tlr CORE_REG_B
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ts CORE_ALU_ADD
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alu
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tlr CORE_REG_C
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tlr CORE_REG_A
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ts FORTH_MEM_INPUT_SIZE
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tlr CORE_REG_B
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ts CORE_ALU_LT
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alu
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tlr CORE_REG_A
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ts loop
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tlrc CORE_REG_PC
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ts "\n"
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tlr CORE_REG_A
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ts CORE_MEM_CHR
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set
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tsr CORE_REG_C
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tls
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dbg
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pop
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ts 0
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tlr CORE_REG_C
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ts loop
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tlr CORE_REG_PC
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@ .std_stop
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@ set PC to maximum for u16 and therefore stops program execution
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ts 0xffff @ load 0xffff into TMP
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tlr CORE_REG_PC @ store value of TMP into register PC
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jump_switch:
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dbg
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.org jump_main
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ts main
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tlr CORE_REG_PC
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