diff --git a/hence/hence.circ b/hence/hence.circ new file mode 100644 index 0000000..057c374 --- /dev/null +++ b/hence/hence.circ @@ -0,0 +1,201 @@ + + + This file is intended to be loaded by Logisim-evolution v3.7.2(https://github.com/logisim-evolution/). + + + + + + + + + + + + + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + addr/data: 16 8 +3 7f fc 86 1 0 1 1 +0 2 85 82 6 0 5 85 +6 0 6 4 0 5 88 4 +0 6 88 89 3 ff ff 86 +32732*0 3 0 4 86 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/hence/lib/core.asm b/hence/lib/core.asm index 88e66e6..b33bc16 100644 --- a/hence/lib/core.asm +++ b/hence/lib/core.asm @@ -17,7 +17,7 @@ core: .define CORE_MEM_PRG_END, (32 * CORE_KB) .define CORE_MEM_ST, CORE_MEM_PRG_END .define CORE_MEM_MEM, (40 * CORE_KB) - .define CORE_MEM_MEM_END, (56 * CORE_KB) + .define CORE_MEM_MEM_END, (48 * CORE_KB) .define CORE_MEM_OUT, CORE_MEM_MEM_END .define CORE_MEM_CHR, (CORE_MEM_MEM_END + 1) .define CORE_MEM_KEY, (CORE_MEM_MEM_END + 2) diff --git a/hence/src/lib/emulator.rs b/hence/src/lib/emulator.rs index 8a0a575..ad66d95 100644 --- a/hence/src/lib/emulator.rs +++ b/hence/src/lib/emulator.rs @@ -17,7 +17,6 @@ pub struct Data { pub reg_b: u16, pub reg_c: u16, pub reg_d: u16, - stack: [u16; 8 * 1024], memory: [u16; 16 * 1024], term: console::Term, } @@ -36,7 +35,6 @@ impl Data { reg_b: 0, reg_c: 0, reg_d: 0, - stack: [0; 8 * 1024], memory: [0; 16 * 1024], term: console::Term::stdout(), } @@ -48,11 +46,11 @@ impl Data { Some(val) => Ok(*val as u16), None => Ok(0), } - } else if address < (40 * 1024) { - Ok(self.stack[(address - (32 * 1024)) as usize]) - } else if address < (56 * 1024) { + // } else if address < (40 * 1024) { + // Ok(self.stack[(address - (32 * 1024)) as usize]) + } else if address < (48 * 1024) { Ok(self.memory[(address - (40 * 1024)) as usize]) - } else if address == (56 * 1024 + 2) { + } else if address == (48 * 1024 + 2) { Ok(self.term.read_char()? as u16) } else { Ok(0) @@ -60,14 +58,14 @@ impl Data { } pub fn set_memory(&mut self, address: u16, value: u16) -> Result<()> { - if ((32 * 1024)..(40 * 1024)).contains(&address) { - self.stack[(address - (32 * 1024)) as usize] = value; - } else if address < (56 * 1024) { - self.memory[(address - (40 * 1024)) as usize] = value; - } else if address == (56 * 1024) { - print!("{value}"); + // if ((32 * 1024)..(40 * 1024)).contains(&address) { + // self.stack[(address - (32 * 1024)) as usize] = value; + if ((32 * 1024)..(48 * 1024)).contains(&address) { + self.memory[(address - (32 * 1024)) as usize] = value; + } else if address == (48 * 1024) { + print!("{}", value); io::stdout().flush()?; - } else if address == (56 * 1024 + 1) { + } else if address == (48 * 1024 + 1) { print!("{}", char::from(value as u8)); io::stdout().flush()?; } @@ -237,12 +235,12 @@ pub fn emulate(data: &mut Data) -> Result<()> { match data.reg_opc { 0x00 => {} 0x01 => { - data.stack[data.reg_sp as usize] = data.reg_arg; + data.memory[data.reg_sp as usize] = data.reg_arg; data.reg_sp = data.reg_sp.wrapping_add(1); } 0x02 => { data.reg_sp = data.reg_sp.wrapping_sub(1); - data.stack[data.reg_sp as usize] = 0; + data.memory[data.reg_sp as usize] = 0; } 0x03 => { data.tmp = data.reg_arg; @@ -251,7 +249,7 @@ pub fn emulate(data: &mut Data) -> Result<()> { data.tmp = data.get_register(data.reg_arg as u8); } 0x05 => { - data.tmp = data.stack[data.reg_sp.wrapping_sub(1) as usize]; + data.tmp = data.memory[data.reg_sp.wrapping_sub(1) as usize]; } 0x06 => { data.set_register(data.reg_arg as u8, data.tmp); @@ -262,7 +260,7 @@ pub fn emulate(data: &mut Data) -> Result<()> { } } 0x08 => { - data.stack[data.reg_sp as usize] = data.tmp; + data.memory[data.reg_sp as usize] = data.tmp; data.reg_sp = data.reg_sp.wrapping_add(1); } // 0x09 => { @@ -273,7 +271,7 @@ pub fn emulate(data: &mut Data) -> Result<()> { 0x09 => { println!( "[DEBUG]: [{}]", - data.stack.iter().take(data.reg_sp as usize).join(", ") + data.memory.iter().take(data.reg_sp as usize).join(", ") ); print!("Press enter to continue execution...",); io::stdout().flush()?;